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Digital VLSI design and simulation with Verilog

Title
Digital VLSI design and simulation with Verilog / Suman Lata Tripathi, Sobhit Saxena, Sanjeet Kumar Sinha, Govind Singh Patel.
ISBN
9781119778097
1119778093
9781119778066
1119778069
9781119778080
1119778085
9781119778042
Publication
Hoboken, NJ : John Wiley & Sons, 2022.
Physical Description
1 online resource
Local Notes
Access is available to the Yale community.
Notes
Description based on print version record and CIP data provided by publisher; resource not viewed.
Access and use
Access restricted by licensing agreement.
Summary
"The integrated circuits are now growing its importance in every electronic system that needs an efficient VLSI architecture designs with low power consumption, compress chip area, speed, and operating frequency. The challenge for VLSI system designers is to optimize the hardware-software integration for lowering the total cost of acquisition of products. So, there is a demand for better technological solutions for advanced VLSI architectures that can be done through hardware description language (HDL). Verilog HDL is one of the programming languages that can give better solutions to this new era of the VLSI industry. The prefabrication design and analysis of such advanced VLSI architecture can be easily implemented with Verilog HDL with the available software tools like Xilinx and Cadence. The presented book mainly deals with fundamental concepts of digital design along with their design verification with Verilog HDL. The book will be a common source of knowledge for the beginners as well as research seeking students working in the area of VLSI design covering fundamentals of digital design from switch level to FPGA based implementation using hardware description language (HDL). The book is summarized in 10 chapters. Chapter 1 and 2 describes the fundamental concepts behind digital circuit design including combinational and sequential circuit design. Chapter 3 to chapter 8 is focused on sequential and combinational circuit design using Verilog HDL at a different level of abstractions in Verilog coding. Chapter 9 includes implementation of any logic function using a programmable logic device like PLD, CPLD or FPGA, etc. Chapter 10 covers a few real-time examples of digital circuit design using Verilog. Chapter 11 focuses on System Verilog, distinct features, computing Verilog and System Verilog with design example."-- Provided by publisher.
Variant and related titles
O'Reilly Safari. OCLC KB.
Other formats
Print version: Tripathi, Suman Lata. Digital VLSI design and simulation with Verilog Hoboken, NJ : John Wiley & Sons, 2022
Format
Books / Online
Language
English
Added to Catalog
March 03, 2022
Bibliography
Includes bibliographical references and index.
Citation

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