Librarian View
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16160894
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20220303140953.0
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210511s2022 nju ob 001 0 eng
035
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(OCoLC)on1252736079
040
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DLC
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eng
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rda
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DLC
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OCLCO
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OCLCF
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ORMDA
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DG1
020
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9781119778097
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(ebook)
020
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1119778093
020
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9781119778066
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(pdf)
020
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1119778069
020
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9781119778080
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(epub)
020
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1119778085
020
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9781119778042
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(hardback)
037
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9781119778042
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O'Reilly Media
042
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pcc
050
0
0
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TK7874.75
100
1
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Tripathi, Suman Lata,
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author.
245
1
0
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Digital VLSI design and simulation with Verilog /
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Suman Lata Tripathi, Sobhit Saxena, Sanjeet Kumar Sinha, Govind Singh Patel.
264
1
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Hoboken, NJ :
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John Wiley & Sons,
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2022.
300
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1 online resource
336
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text
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txt
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rdacontent
337
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computer
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c
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rdamedia
338
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online resource
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cr
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rdacarrier
504
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Includes bibliographical references and index.
506
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Access restricted by licensing agreement.
520
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"The integrated circuits are now growing its importance in every electronic system that needs an efficient VLSI architecture designs with low power consumption, compress chip area, speed, and operating frequency. The challenge for VLSI system designers is to optimize the hardware-software integration for lowering the total cost of acquisition of products. So, there is a demand for better technological solutions for advanced VLSI architectures that can be done through hardware description language (HDL). Verilog HDL is one of the programming languages that can give better solutions to this new era of the VLSI industry. The prefabrication design and analysis of such advanced VLSI architecture can be easily implemented with Verilog HDL with the available software tools like Xilinx and Cadence. The presented book mainly deals with fundamental concepts of digital design along with their design verification with Verilog HDL. The book will be a common source of knowledge for the beginners as well as research seeking students working in the area of VLSI design covering fundamentals of digital design from switch level to FPGA based implementation using hardware description language (HDL). The book is summarized in 10 chapters. Chapter 1 and 2 describes the fundamental concepts behind digital circuit design including combinational and sequential circuit design. Chapter 3 to chapter 8 is focused on sequential and combinational circuit design using Verilog HDL at a different level of abstractions in Verilog coding. Chapter 9 includes implementation of any logic function using a programmable logic device like PLD, CPLD or FPGA, etc. Chapter 10 covers a few real-time examples of digital circuit design using Verilog. Chapter 11 focuses on System Verilog, distinct features, computing Verilog and System Verilog with design example."--
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Provided by publisher.
588
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Description based on print version record and CIP data provided by publisher; resource not viewed.
590
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Access is available to the Yale community.
650
0
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Integrated circuits
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Very large scale integration
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Design and construction.
650
0
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Verilog (Computer hardware description language)
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http://id.loc.gov/authorities/subjects/sh90004761
650
7
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Integrated circuits
|x
Very large scale integration
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Design and construction.
|2
fast
|0
(OCoLC)fst00975610
700
1
|a
Saxena, Sobhit,
|e
author.
700
1
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Sinha, Sanjeet Kumar,
|e
author.
700
1
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Patel, Govind Singh,
|e
author.
730
0
|a
O'Reilly Safari.
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OCLC KB.
776
0
8
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Print version:
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Tripathi, Suman Lata.
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Digital VLSI design and simulation with Verilog
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Hoboken, NJ : John Wiley & Sons, 2022
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9781119778042
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(DLC) 2021020790
852
8
0
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yulint
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None
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Online resource
852
8
0
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Online resource
856
4
0
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Online book
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https://go.oreilly.com/yale-university/library/view/-/9781119778042/?ar
901
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TK7874.75
902
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Yale Internet Resource
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Yale Internet Resource >> None|DELIM|16092871
905
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online resource
907
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2022-03-03T14:09:53.000Z
946
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DO NOT EDIT. DO NOT EXPORT.